SEI Fellows Series: Peter Feiler
June 2017 • Podcast
Peter Feiler was named an SEI Fellow in August 2016. This podcast is the second in a series highlighting interviews with SEI Fellows.
“You can talk about the function of software, but if you want to talk, say performance, you only can talk about that in the context of it running on some hardware. If you want to talk about safety you have to talk about how it distributed on the hardware, how good the hardware is, in addition to how good the software is, and how well it interacts with the physical environment. These interactions present the majority of problems in embedded software systems.”
Software Engineering Institute
The position of SEI Fellow is awarded to people who have made an outstanding contribution of the work of the SEI and from home the SEI leadership may expect valuable advice for continued success in the institute’s mission. Peter Feiler was named an SEI Fellow in August 2016. This podcast is the second in a series highlighting interviews with SEI Fellows
About the Speaker
For the last 32 years, Peter Feiler has been a member of the SEI, where his duties include five years of management. His interests include safety-critical embedded software systems, architecture languages, ...
For the last 32 years, Peter Feiler has been a member of the SEI, where his duties include five years of management. His interests include safety-critical embedded software systems, architecture languages, and software system assurance.
Feiler is the technical lead and author of the SAE AS-2C Architecture Analysis & Design Language (AADL) standard. This standard was originally published in November 2004 as SAE document AS5506. Version 2.2 of the standard was published in January 2017. Feiler also was the author of the Error Model Annex V2 Annex standard for AADL, published in 2015.
Before joining the SEI, Feiler conducted research and led a group in software technology at the Siemens Corporate Research and Technology Lab in Princeton, NJ. During that period, he was the system architect for the software development environment in large-scale product development.
Feiler received the Carnegie Science Award for Information Technology in 2009 for his work with AADL.
Feiler earned a PhD in computer science from Carnegie Mellon University and was appointed SEI fellow in August 2016.