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Survey of Formal Specification Techniques for Reactive Systems

May 1990 Technical Report
Patrick R. Place, William G. Wood, Mike Tudball

This report, published in 1990, develops a set of evaluation criteria and evaluates Communicating Sequential Processes (CSP), the Vienna Development Method (VDM), and temporal logic.

Publisher:

Software Engineering Institute

CMU/SEI Report Number

CMU/SEI-90-TR-005

Abstract

Formal methods are being considered for the description of many systems including systems with real-time constraints and multiple concurrently executing processes. This report develops a set of evaluation criteria and evaluates Communicating Sequential Processes (CSP), the Vienna Development Method (VDM), and temporal logic. The evaluation is based on specifications, written with each of the techniques, of an example avionics system.